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  tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 1 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 infrared transceiver module (sir, 115.2 kbit/s) for irda ? applications description the tfdu4101 transceiver is an infrared transceiver module compliant to the latest irda ? physical layer st andard for fast infrared data communication, supporting irda speeds up to 115.2 kbit/s (sir), and carrier based remote control modes. integrated within the transceiver module are a photo pin diode, an infrared emitter (ire d), and a low-power control ic to provide a total front-end solution in a single package. this device covers the full irda rang e of more than 1 m using the internal intensity control. with one external current control resistor the current can be adjusted for shorter ranges saving operating current operating in irda low power mode. this vishay sir transceiver is using the lead frame technology. ? the receiver output pulse duration is independent of the optical input pulse duration and recovers always a fixed pulse duration optimum for compatibility to standard endecs and interfaces. tfdu4101 has a tristate output and is floating in shutdown mode with a weak pull-up. features ? operates from 2.4 v to 5.5 v within specification over full temperature range from - 30 c to + 85 c ? split power supply, tr ansmitter and receiver can be operated from two power supplies with relaxed requirem ents saving costs, us - patent no. 6,157,476 ? low power consumption (< 0. 12 ma supply current in receive mode, no signal) ? power shutdown mode (< 4 a shutdown current in full temperature range, up to 85 c, < 10 na at 25 c) ? surface mount package (l x w x h in mm): 9.7 4.7 4 ? high efficiency emitter ? low profile (universal) package capable of surface mount soldering to side and top view orientation ? directly interfaces with various super i/o and controller devices as e. g. toim4232 ? tri-state-receiver output, floating in shut down with a weak pull-up ? qualified for lead (pb)-free and sn/pb processing (msl4) ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ? printers, fax machines, phot ocopiers, screen projectors ? internet tv boxes, video conferencing systems ? medical data collection ? diagnostic systems ? notebook computers, desktop pcs, palmtop computers (win ce, palm pc), pdas ? internet tv boxes, video conferencing systems ? external infrared adapters (dongles) ? data loggers ?gps ? kiosks, pos, point and pay devices ? industrial applications 20110 product summary part number data rate (kbit/s) dimensions h x l x w (mm x mm x mm) link distance (m) operating voltage (v) idle supply current (ma) tfdu4101 115.2 4 x 9.7 x 4.7 0 to ? 1 2.4 to 5.5 0.07 parts table part description qty/reel TFDU4101-TR3 oriented in carr ier tape for side view surface mounting 1000 pcs tfdu4101-tt3 oriented in ca rrier tape for top view surface mounting 1000 pcs
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 2 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 functional block diagram contro lle d dr iv er tr i- stat e dr iv er gnd txd rxd v cc2 v cc1 am pl if ie r co mp ar ator sd lo gi c and contro l ir ed c 18468 pin description pin number symbol description i/o active 1 v cc2 ired anode ired anode to be externally connected to v cc2 . an external resistor is only necessary for controlling the ired current when a current reduction below 300 ma is intended to op erate in irda low power mode. this pin is allowed to be supplied from an uncontrolled power supply separated from th e controlled v cc1 - supply. 2 ired cathode ired cathode, internal ly connected to driver transistor 3txd this schmitt-trigger input is used to transmit serial data when sd is low. an on-chip protection ci rcuit disables the led dr iver if the txd pin is asserted for longer th an 50 s (max. 300 s). ihigh 4rxd received data output, push-pull cmos driver output capable of driving standard cmos or ttl loads. during transmission the rxd output is active (echo-on). no exte rnal pull-up or pull-down resistor is required. floating with a we ak pull-up of 500 k ? (typ.) in shutdown mode. olow 5 sd shutdown i high 6v cc1 supply voltage 7 nc no internal connection i 8 gnd ground
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 3 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 pinout tfdu4101 ? weight 200 mg ? note ? reference point pin, gnd unless otherwise noted. typical values are for design aid only, not guaranteed nor subject to product ion testing. note ? vishay transceivers operating inside the absolute maximum ratings are classified as eye safe according the above table. ?u? option baby face (universal) ired detector 1357 2468 17087 absolute maximum ratings parameter test conditions symbol min. typ. max. unit supply voltage range, transceiver - 0.3 v < v cc2 < 6 v v cc1 - 0.5 6 v supply voltage range, transmitter - 0.5 v < v cc1 < 6 v v cc2 - 0.5 6 v voltage at rxd - 0.5 v < v cc1 < 6 v v rxd - 0.5 v cc1 + 0.5 v voltage at all inputs and outputs v in > v cc1 is allowed v in - 0.5 6 v input currents for all pins, except ired anode pin 10 ma output sinking current 25 ma power dissipation see derating curve p d 250 mw junction temperature t j 125 c ambient temperature range (operating) t amb - 30 + 85 c storage temperature range t stg - 30 + 85 c soldering temperature see recommended solder profile 260 c average output current, pin 1 i ired (dc) 80 ma repetitive pulse output current, pin 1 to pin 2 < 90 s, t on < 20 % i ired (rp) 400 ma eye safety information standard classification iec/en 60825-1 (2007-03), din en 60825-1 ( 2008-05) safety of laser products - ? part 1: equipment classification and requirements, simplified method class 1 iec 62471 (2006), cie s009 (2002) p hotobiological safe ty of lamps and lamp systems exempt directive 2006/25/ec of the european parliament and of the council of 5 th april 2006 on the minimum health and safety requirements regarding the exposure of workers to risks arising from physical agents (artificial optical radiation) (19 th individual directive within the meaning of article 16(1) of directive 89/391/eec) exempt
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 4 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes ?t amb = 25 c, v cc1 = v cc2 = 2.4 v to 5.5 v unless otherwise noted. ? typical values are for design aid only, not guaranteed nor subject to production testing. (1) standard illuminant a. (2) the typical threshold level is 0.5 x v cc1 . it is recommended to use the specified min./max. values to avoid increased operating current. electrical characteristics parameter test conditions/pins symbol min. typ. max. unit transceiver supply voltage v cc1 2.4 5.5 v dynamic supply current sd = low, e e = 1 klx (1) , t amb = - 25 c to + 85 c v cc1 = v cc2 = 2.4 v to 5.5 v i cc1 40 90 130 a dynamic supply current sd = low, e e = 1 klx (1) , t amb = 25 c v cc1 = v cc2 = 2.4 v to 5.5 v i cc1 40 75 a average dynamic supply current, transmitting i ired = 300 ma, 25 % duty cycle i cc 0.65 2.5 ma shutdown supply current sd = high, t = 25 c, e e = 0 klx no signal, no resistive load i sd 0.01 0.1 a sd = high, t = 70 c no signal, no resistive load i sd 1a sd = high, t = 85 c no signal, no resistive load i sd 1a operating temperature range t a - 30 + 85 c output voltage low, rxd c load = 15 pf v ol - 0.5 0.15 x v cc1 v output voltage high, rxd i oh = - 500 a, c load = 15 pf v oh 0.8 x v cc1 v cc1 + 0.5 v i oh = - 250 a, c load = 15 pf v oh 0.9 x v cc1 v cc1 + 0.5 v rxd to v cc1 impedance r rxd 400 500 600 k ? input voltage low (txd, sd) v il - 0.5 0.5 v input voltage high (txd, sd) 1.5 v ? v logic ? 2.5 v (2) v ih 0.8 x v cc1 6v v logic > 2.5 v (2) v ih v cc1 - 0.5 6 v input leakage current (txd, sd) v in = 0.9 x v cc1 i ich - 2 + 2 a controlled pull down current ? 0 < v in < 0.15 v cc1 ? v in > 0.7 v cc1 sd, txd = 0 or 1 i irtx - 1 0 + 150 1 a a input capacitance (txd, sd) c i 5pf
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 5 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes (3) t amb = 25 c, v cc1 = v cc2 = 2.4 v to 5.5 v unless otherwise noted. ? typical values are for design aid only, not gu aranteed nor subject to production testing. (4) irda specification is 40 mw/m 2 . specification takes a window loss of 10 % into account. (5) irda sensitivity definiti on: minimum irradiance e e in angular range, power per unit area. the re ceiver must meet the ber specification while the source is operating at the minimum intensity in angular rang e into the minimum half-angular range at the maximum link lengt h. (6) maximum irradiance e e in angular range, power per unit area. the optical delivered to the detector by a source operating at the maximum intensity in angular range at minimum link length must not cause receiver overdrive distortion and possible ralated link errors . if placed at the active output interface reference plane of the transmitter, the receiver must m eet its bit error ratio (ber) specification. (7) using an external current limiting resistor is allowed and reco mmended to reduce ired intensit y and operating current when curr ent reduction is intended to operate at the irda low power conditions. e.g. for v cc2 = 3.3 v a current limiting resistor of r s = 56 ? will allow a power minimized operation at irda low power conditions. (8) due to this wavelength restrictio n compared to the irda spec of 850 nm to 900 nm the tran smitter is able to operate as source f or the standard remote control applications with codes as e.g. phillips rc5/rc6 ? or recs 80. for more definitions see the do cument symbols and terminology on the vishay website. optoelectronic characteristics (1) parameter test conditions symbol min. typ. max. unit receiver minimum irradiance e e in angular range (3) sir mode 9.6 kbit/s to 115.2 kbit/s ? = 850 nm to 900 nm; ? = 0, 15 e e, min. 4 (0.4) 20 (2) 35 (2) (3.5) mw/m 2 (w/cm 2 ) maximum irradiance e e in angular range (4) ? = 850 nm to 900 nm e e, max. 5 (500) kw/m 2 (mw/cm 2 ) rise time of output signal 10 % to 90 %, c l = 15 pf t r (rxd) 20 100 ns fall time of output signal 90 % to 10 %, c l = 15 pf t f (rxd) 20 100 ns rxd pulse width input pu lse length > 1.2 s t pw 1.65 2.2 3 s leading edge jitter input irradiance = 100 mw/m 2 , ? 115.2 kbit/s 250 ns standby/shutdown delay, receiver startup time after shutdown active or power-on 500 s latency t l 100 150 s transmitter ired operating current, switched current limiter no external resistor for current limitation (5) i d 250 300 350 ma forward voltage of built-in ired i f = 300 ma v f 1.4 1.8 1.9 v output leakage ired current i ired - 1 1 a output radiant intensity ? = 0, 15 txd = high, sd = low i e 48 65 mw/sr output radiant intensity v cc1 = 5 v, ? = 0, 15 txd = low or sd = high (receiver is inactive as long as sd = high) i e 0.04 mw/sr output radiant intensity, ? angle of half intensity ? 24 deg peak - emission wavelength (6) ? p 880 900 nm spectral bandwidth ?? 45 nm optical rise time , optical fall time t ropt , t fopt 10 300 ns optical output pulse duration input pulse width 1.6 s < t txd < 20 s t opt t txd - 0.15 t txd + 0.15 s optical output pulse dura tion input pulse width t txd ? 20 s t opt 20 300 s optical overshoot 25 %
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 6 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 recommended circuit diagram operated with a clean low impedance powe r supply the tfdu4101 needs no additional external components. however, depending on the en tire system design and board layout, additional components ma y be required (see figure 1). that is especially the case when separate power supplies are used for bench tests. when using compact wiring and regulated supplies as e. g. in phone applications in most cases no external components are necessary. fig. 1 - recommended test circuit note *) r1 is optional when reduced intensity is used. the capacitor c1 is buffering the supply voltage and eliminates the inductance of the power supply line. this one should be a tantalum or othe r fast capacitor to guarantee the fast rise time of the ired current. the resistor r1 is the current limiting resistor, whic h may be used to reduce the operating current to levels below the specified controlled values for saving battery power. ? vishay's transceivers integrate a sensitive receiver and a built-in power driver. the combination of both needs a careful circuit board layout. the use of thin, long, resistive and inductive wiring should be avoided. the shutdown input must be grounded for normal operation, also when the shutdown function is not used. ? the inputs (txd, sd) and the ou tput rxd should be directly connected (dc-coupled) to the i/o circuit. the capacitor c2 combined with the resistor r2 is the low pass filter for smoothing the supply voltage. r2, c1 and c2 are optional and dependent on the qualit y of the supply voltages v cc1 and injected noise. an unstabl e power supply with dropping voltage during transmission ma y reduce the sensitivity (and transmission range) of the transceiver. ? the placement of these parts is critical. it is strongly recommended to position c2 as close as possible to the transceiver power supply pins. ? when extended wiring is used (bench tests!) the inductance of the power supply can cause dynamically a voltage drop at v cc2 . often some power supplies are not able to follow the fast current rise time. in that case another 4.7 f (type, see table under c1) at v cc2 will be helpful. ? under extreme emi conditions as placing an rf-transmitter antenna on to p of the transceiver, we recommend to protect all inputs by a low-pass filter, as a minimum a 12 pf capacitor, espe cially at the rxd port. the transceiver itself withstands emi at gsm frequencies above 500 v/m. when interference is observed, the wiring to the inputs picks it up. it is verifi ed by dpi measurements that as long as the interfering rf - voltage is below the logic threshold levels of the inputs and equivalent levels at the outputs no interferences are expected. ? one should keep in mind that basic rf-design rules for circuit design should be taken into account. especially longer signal lines should no t be used without termination. see e.g. "the art of electronics" paul horowitz, winfield hill, 1989, cambridge university press, isbn: 0521370957. ? ? ? ? ? ? figure 2 shows an ex ample of a typical application with a separate supply voltage v s and using the transceiver with the ired anode connected to the unregulated battery v batt . this method reduces the peak load of the regulated power supply and saves therefore costs. alternatively all supplies can also be tied to only one voltage source. r1 and c1 are not used in this case and are depending on the circuit design in most cases not necessary. ? in figure 2 an option is shown to operate the transmitter at two different power levels to switch for long range to low power mode for e.g. saving power for irda application but use the full range specificatio n for remote control. the additional components are marked in the figure. ? for operating at rs232 ports toim4232 is recommended as endec. v cc2 , ired a v cc1 ground sd txd rxd ired c v ired v cc gnd sd txd rxd r1 *) r2 c1 c2 20037 table 1 - recommended tests and application circuit components component recommended value vishay part number c1 4.7 f, 16 v 293d 475x9 016b c2 0.1 f, ceramic vj 1206 y 104 j xxmt r1 depends on current to be adjusted, e. g. with v cc2 = 3.3 v 56 ? is an option for minimum low power operation r2 47 ? , 0.125 w crcw-1206-47r0-f-rt1
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 7 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 2 - typical application circuit grey: optional for high/low switching i/o and software in the description, already di fferent i/os are mentioned. different combinations are tested and the function verified with the special drivers availa ble from the i/o suppliers. in special cases refer to the i/o manual, the vishay application notes, or contact directly vishay sales, marketing or application. current derating diagram figure 3 shows the maximum operating tempe rature when the device is operated without external current limiting resistor. fig. 3 - current derating diagram r2 c2 ired anode (1) ired cathode (2) txd (3) rxd (4) sd (5) v cc1 (6) g n d ( 8 ) v s = 2. 8 v v dd v b att ? 3 v irt x irr x ir mod e r1 hi/low c1 2003 8 50 55 60 65 70 75 8 0 8 5 90 2 2.5 3 3.5 4 4.5 5 5.5 6 operating v oltage ( v ) at d u ty cycle 20 % am b ient temperat u re (c) 1 8 097 table 2 - truth table inputs outputs remark sd txd optical input irradiance mw/m 2 rxd transmitter operation high > 1 ms xx weakly pulled (500 k ? ) to v cc1 0 shutdown low high < 50 s x low active i e transmitting high > 50 s x high inacti ve 0 protection is active low < 4 high inactive 0 ignoring low signals below the irda defined threshold for noise immunity low > min. irradiance e e < max. irradiance e e low (active) 0 response to an irda compliant optical input signal low > max. irradiance e e undefined 0 overload condit ions can cause unexpected outputs
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 8 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 recommended solder profiles solder profile for sn/pb soldering fig. 4 - recommended solder profile for sn/pb soldering lead (pb)-free, recommended solder profile the tfdu4101 is a lead (pb)-f ree transceiver and qualified for lead (pb)-free processing. for lead (pb)-free solder paste like sn (3.0-4.0) ag (0.5-0.9) cu, there are two standard reflow profiles: ramp-soak-spike (rss) and ramp-to-spike (rts). the ramp-soak-spike profile was developed primarily for reflow ovens heated by infrared radiation. with widespread use of forced convection reflow ovens the ramp-to-spike profile is used increasingly. shown below in figure 5 and 6 are vishay's recommended profiles for use with the tfdu4101 transceivers . for more details please refer to the application note smd assembly instructions. ? a ramp-up rate less than 0. 9 c/s is not recommended. ramp-up rates faster than 1.3 c/s could damage an optical part because the thermal conduc tivity is less than compared to a standard ic. wave soldering for tfduxxxx and tfbsxxxx tr ansceiver devices wave soldering is not recommended. manual soldering manual soldering is the standard method for lab use. however, for a production process it cannot be recommended because the risk of damage is highly dependent on the experience of the operator. nevertheless, we added a chapter to the above mentioned application note, describing manual so ldering and desoldering. storage the storage and drying processe s for all vishay transceivers (tfduxxxx and tfbsxxx) are equivalent to msl4. ? the data for the drying procedure is given on labels on the packing and also in the application note taping, labeling, storage and packing. fig. 5 - solder profile, rss recommendation fig. 6 - rts recommendation 0 20 40 60 80 100 120 140 160 180 200 220 240 260 0 50 100 150 200 250 300 350 time/s temperature (c) 2 to 4 c/s 2 to 4 c/s 10 s max. at 230 c 120 to180 s 160 c max. 240 c max. 90 s max. 19535 0 25 50 75 100 125 150 175 200 225 250 275 0 50 100 150 200 250 300 350 time/s temperature/c 30 s max. 2 c/s to 3 c/s 2 c/s to 4 c/s 90 s to 120 s t 217 c for 70 s max. t peak = 260 c 70 s max. t 255 c for 10 s....30 s 19532 0 40 80 120 160 200 240 280 0 50 100 150 200 250 300 time/s temperature/c < 4 c/s 1.3 c/s time above 217 c t 70 s time above 250 c t 40 s peak temperature t peak = 260 c < 2 c/s t peak = 260 c max. tfdu fig3
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 9 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 package dimensions in millimeters fig. 7 - package drawing tfdu4101. tole rance 0.2 mm if not otherwise mentioned fig. 8 - recommended foot print for side view appli cations and solderpaste mask 18470 7x1=7 8 1 1 2.5 0.6 20035
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 10 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 9 - recommended footprint for top view applications and solderpaste mask reel dimensions in millimeters 20036 14017 drawing-no.: 9.800-5090.01-4 issue: 1; 29.11.05 tape width (mm) a max. (mm) n (mm) w 1 min. (mm) w 2 max. (mm) w 3 min. (mm) w 3 max. (mm) 24 330 60 24.4 30.4 23.9 27.4
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 11 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 tape dimensions in millimeters fig. 10 - tape drawing, tfdu4101 for top view mounting, tolerance 0.1 mm handling precaution sagging of carrier tape may cause some unit s to rotate and will result to pick-and-pla ce problem. do not allow carrier tape to sag as shown in picture below. 19824 drawing-no.: 9.700-5251.01-4 issue: 3; 02.09.05
tfdu4101 www.vishay.com vishay semiconductors rev. 1.6, 04-jul-12 12 document number: 81288 for technical questions within your region: irdasupportam@vishay.com , irdasupportap@vishay.com , irdasupporteu@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 11 - tape drawing, tfdu4101 for side view mo unting, tolera nce 0.1 mm 19875
legal disclaimer notice www.vishay.com vishay revision: 02-oct-12 1 document number: 91000 disclaimer all product, product specifications and data are subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain type s of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular application. it is the customers responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vish ays terms and condit ions of purchase, including but not limited to the warranty expressed therein. except as expressly indicate d in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vi shay product could result in personal injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk. pleas e contact authorized vishay personnel to ob tain written terms and conditions regarding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of vishay. product names and markings noted herein may be trad emarks of their respective owners. material category policy vishay intertechnology, inc. hereby certi fies that all its products that are id entified as rohs-compliant fulfill the definitions and restrictions defined under directive 2011/65/eu of the euro pean parliament and of the council of june 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (eee) - recast, unless otherwis e specified as non-compliant. please note that some vishay documentation may still make reference to rohs directive 2002/95/ ec. we confirm that all the products identified as being compliant to directive 2002 /95/ec conform to directive 2011/65/eu. vishay intertechnology, inc. hereby certifi es that all its products that are identified as ha logen-free follow halogen-free requirements as per jedec js709a stan dards. please note that some vishay documentation may still make reference to the iec 61249-2-21 definition. we co nfirm that all the products identified as being compliant to iec 61249-2-21 conform to jedec js709a standards.


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